1. Field
Example embodiments relate to a semiconductor circuit, and, more particularly, to a circuit having an active clock shielding structure and a semiconductor integrated circuit including the same.
2. Description of the Related Art
As semiconductor process technology continues to develop, the degree of integration for a semiconductor integrated circuit continues to increase. As a result, signal interference (e.g., coupling noise) between signal lines becomes more problematic because the number of signal lines per unit area continues to increase.
For this reason, it is common for designers to include additional shielding lines for preventing signal interference. However, the inclusion of such additional shielding lines can degrade the degree of integration of the semiconductor integrated circuit and can increase design overhead.